2D semiconductors such as graphene, boron nitride, and metal dichalcogenides (MDCs) are extremely un-reactive. This presents challenges to including 2D materials in device structures. Nucleation of any surface bonding either occurs only at defects, contaminants, or step edges or induced defects. Existing functionalization methods provide low nucleation density.
2-D materials are single layer or a few layers that consist of a network of atoms, such as carbon, MoS2 and WS3. The 2D materials are highly attractive for future electronic devices because the materials provide ballistic transport of charge carriers, resulting in high carrier mobility.
The growth of oxides on graphene is also problematic. Oxide coating is normally performed with plasma on metal or ceramics with physical or chemical vapor deposition or atomic layer deposition (ALD). On the surface, base metal is deposited, then plasma is applied to surface to coat oxide. In the conventional atomic layer deposition (ALD) process on graphene or other 2D semiconductors, the oxide selectively nucleates on defect sites or step edges, due to the chemically passive (non-reactive) nature of the 2D semiconductor basal planes. Such non-uniformly grown oxide can create massive leakage currents in graphene based device. See, e.g., Xuan, Y.; Wu, Y. Q.; Shen, T.; Qi, M.; Capano, M. A.; Cooper, J. A., “Atomic-layer-deposited nanostructures for graphene-based nanoelectronics,” Ye, P. D. Appl Phys Lett 9 (2008). This non-uniform oxide growth severely limits oxide scaling.
Deposition of dielectric oxide on functionalized graphene via ALD has been studied with respect to techniques that chemically modify the graphene. One technique used gaseous O3 to chemically modify the graphene surface. See, e.g., Jandhyala, S.; Mordi, G.; Lee, B.; Lee, G.; Floresca, C.; Cha, P. R.; Ahn, J.; Wallace, R. M.; Chabal, Y. J.; Kim, M. J.; Colombo, L.; Cho, K.; Kim, J, “Atomic Layer Deposition of Dielectrics on Graphene Using Reversibly Physisorbed Ozone,” Acs Nano 6, 2722 (2012). This research reported that ozone molecules are physisorbed on the surface of graphene, and act as nucleation sites for dielectric deposition and that the physisorbed ozone molecules eventually react with the metal precursor. Some of research group has studied covalent bonding nucleation with multiple cycles of a trimethylaluminum (TMA) and NO2 were performed to functionalize the graphene for oxide growth. (See, Williams, J. R.; DiCarlo, L.; Marcus, “Quantum Hall Effect in a Gate-Controlled p-n Junction of Graphene,” C. M. Science, 317, 638 (2007)). Other research groups have tried to employ organic layers, such as perylene tetracarboxylic acid (PTCA) to nucleate ALD. See, Wang, X. R.; Tabakman, S. M.; Dai, H. J. “Atomic Layer Deposition of Metal Oxides on Pristine and Functionalized Graphene,” J Am Chem Soc 130, 8152 (2008). In this technique, noncovalent functionalization of graphene was reported through the use of carboxylate-terminated perylene molecules. Recent work using perylene tetracarboxylic dianhydride (PTCDA) to nucleate gate still employs thick oxide layer; see Vinod K. Sangwan et al, “Quantitatively Enhanced Reliability and Uniformity of High-κ Dielectrics on Graphene Enabled by Self-Assembled Seeding Layers” NanoLetters, 13, 1162-1167 (2013) and Justice M. P. Alaboson et al “Seeding Atomic Layer Deposition of High-k Dielectrics on Epitaxial Graphene with Organic Self-Assembled Monolayers” ACS Nano 5(6), 5223-5232 (2011). The PTCDA was deposited by molecular beam epitaxy and required 11 nm of gate oxide growth to reduce gate leakage, which indicates the ALD is not nucleated on each PTCA molecule. Furthermore, the most recent paper employs a two temperature ALD process which is slow and the paper states “Less than two monolayers (<2 MLs) of PTCDA were grown in a thermal evaporator (FIG. 1a, Supporting S1), followed by ALD growth of Al2O3 and HfO2 dielectrics)” indicating than a uniform monolayer of PTCDA could not be formed across large areas.
Graphene has ultrahigh carrier mobility due to its structure that consists of sp2 bonded carbon atoms in a honeycomb lattice forming a single layer. Fabricating conventional transistors with graphene is challenging because intrinsic graphene has zero band gap. Much effort has been devoted to solving this difficulty, and new device models have been proposed. These include BiSFETs (Bilayer pseudoSpin Field Effect Transistor), GIGs (graphene-insulator-graphene devices very similar to BiSFETs), and Tunnel FETs (Field Effect Transistor). For BiSFETs and related devices, the concept is to insert a thin dielectric layer between two layers of graphene thereby generating electrons in one layer and holes in the other layer, which can in turn form electron hole pairs (excitons). With proper bias applied, modeling shows that the BiSFET generates electron hole pairs that show superfluid behavior. Due to this superfluidity, BiSFETs can be operated at a very low voltage, which in turn translates to low-power operation. Simulations show that the switching energy requirements of an inverterbased on the BiSFET will be much lower than an inverter based on existing CMOS (Complementary Metal Oxide Semiconductor) FETs.
Hexagonal Boron nitride has been studied as a 2D material inserted between two sheets of graphene for a tunnel (FET). (See Britnell, L.; Gorbachev, R. V.; Jalil, R.; Belle, B. D.; Schedin, F.; Mishchenko, A.; Georgiou, T.; Katsnelson, M. I.; Eaves, L.; Morozov, S. V.; Peres, N. M. R.; Leist, J.; Geim, A. K.; Novoselov, K. S.; Ponomarenko, L. A., “Field-Effect Tunneling Transistor Based on Vertical Graphene Heterostructures, Science 335, 947 (2012)). However, the high dielectric constant (˜4.0) of boron nitride can screen electron-hole interactions in the envisioned future practical transistor devices, e.g., the BiSFET. Additionally, the performance of a device based on boron nitride relies on alignment between the top and bottom 2-D semiconductor layers. Commercially practical techniques have not yet been developed to align graphene to inserted materials.
Practical realization of BiSFET devices needs low dielectric constant (K) materials that can be incorporated between two sheets of graphene. High-K materials can screen interactions between electrons and holes, and prevent the formation of excitons which are essential for functioning of the BiSFET. BiSFET devices require a subnanometer of low-κ nonpolar dielectric. GIG devices require a monolayer of low-κ polar dielectric. Tunnel FETs require a few layers of low-κ dielectric.
The BiSFET concept has been simulated with computational models and not yet verified experimentally. Practical materials for the insulating layers have not been developed. Some have proposed an air gap, PDMA polymer layers or PTCDA (Perylene-3,4,9,10-tetracarboxylic dianhydride) layers as being suitable for the necessary insulator layers in a BiSFET. Incorporation of an air gap in a semiconductor structure is difficult, requiring extremely careful processing to avoid contamination during manufacturing. It is also difficult to avoid electrostatic bending of graphene during or after device fabrication. PDMA and PTCDA polymer layers are problematic because it is difficult to form a uniform subnanometer thick coating and difficult to integrate within a practical device fabrication process.